Voluntary Participation Game Experiments with a Non-Excludable Public Good: Is Spitefulness a Source of Cooperation?.

Economic theory predicts that it is impossible to have cooperation in finitely repeated games such as a prisoner's dilemma game without communication. In an experiment on a voluntary participation game with a non-excludable public good that is a version of a Hawk-Dove game, we obderved that evolutionary stable strategies did not appear, but cooperation emerged through a transmutation from the Hawk-Dove game to a game where a dominant strategy outcome is Pareto efficient.GAME THEORY ; EXPERIMENTS

Colossal electroresistance and colossal magnetoresistive step in paramagnetic insulating phase of single crystalline bilayered manganite(La0.4_{0.4}Pr0.6_{0.6})1.2_{1.2}Sr1.8_{1.8}Mn2_{2}O7_{7}

We report a significant decrease in the low-temperature resistance induced by the application of an electric current on the $ab$-plane in the paramagnetic insulating (PMI) state of (La$_{0.4}$Pr$_{0.6}$)$_{1.2}$Sr$_{1.8}$Mn$_{2}$O$_{7}$. A colossal electroresistance effect attaining -95% is observed at lower temperatures. A colossal magnetoresistive step appears near 5T at low temperatures below 10K, accompanied by an ultrasharp width of the insulator-metal transition. Injection of higher currents to the crystal causes a disappearance of the steplike transition. These findings have a close relationship with the presence of the short-range charge-ordered clusters pinned within the PMI matrix of the crystal studied.Comment: 4 pages 3 figure

Steplike Lattice Deformation of Single Crystalline (La0.4_{0.4}Pr0.6_{0.6})1.2_{1.2}Sr1.8_{1.8}Mn2_{2}O7_{7} Bilayered Manganite

We report a steplike lattice transformation of single crystalline (La$_{0.4}$Pr$_{0.6}$)$_{1.2}$Sr$_{1.8}$Mn$_{2}$O$_{7}$bilayered manganite accompanied by both magnetization and magnetoresistive jumps, and examine the ultrasharp nature of the field-induced first-order transition from a paramagnetic insulator to a ferromagnetic metal phase accompanied by a huge decrease in resistance. Our findings support that the abrupt magnetostriction is closely related to an orbital frustration existing in the inhomogeneous paramagnetic insulating phase rather than a martensitic scenario between competing two phases.Comment: 5 pages,4figures, v4: figures are changed, in press in Phys.Rev.Let

Statistical Mechanics of the Chinese Restaurant Process: lack of self-averaging, anomalous finite-size effects and condensation

The Pitman-Yor, or Chinese Restaurant Process, is a stochastic process that generates distributions following a power-law with exponents lower than two, as found in a numerous physical, biological, technological and social systems. We discuss its rich behavior with the tools and viewpoint of statistical mechanics. We show that this process invariably gives rise to a condensation, i.e. a distribution dominated by a finite number of classes. We also evaluate thoroughly the finite-size effects, finding that the lack of stationary state and self-averaging of the process creates realization-dependent cutoffs and behavior of the distributions with no equivalent in other statistical mechanical models.Comment: (5pages, 1 figure

CAT: A Critical-Area-Targeted Test Set Modification Scheme for Reducing Launch Switching Activity in At-Speed Scan Testing

Reducing excessive launch switching activity (LSA) is now mandatory in at-speed scan testing for avoiding test-induced yield loss, and test set modification is preferable for this purpose. However, previous low-LSA test set modification methods may be ineffective since they are not targeted at reducing launch switching activity in the areas around long sensitized paths, which are spatially and temporally critical for test-induced yield loss. This paper proposes a novel CAT (Critical-Area-Targeted) low-LSA test modification scheme, which uses long sensitized paths to guide launch-safety checking, test relaxation, and X-filling. As a result, launch switching activity is reduced in a pinpoint manner, which is more effective for avoiding test-induced yield loss. Experimental results on industrial circuits demonstrate the advantage of the CAT scheme for reducing launch switching activity in at-speed scan testing.2009 Asian Test Symposium, 23-26 November 2009, Taichung, Taiwa

Automated synthesis of radiopharmaceuticals for positron emission tomography: an apparatus for labelling with [11C] methyl iodide (MIASA)

A fully automated apparatus for the routine synthesis and formulation of short-lived 11C (t1/2 = 20 min) labelled radiopharmaceuticals for positron emission tomography (PET) has been developed. [11C]Carbon dioxide is converted to [11C]methyl iodide, which can be used to label a wide variety of substrates by methylation at C, N, O, or S electron rich centres. The apparatus, MIASA (methyl iodide automated synthesis apparatus), was designed to operate as part of an automated labelling system in a shielded ‘hot’ laboratory. The apparatus was designed without the size constraints of typical instrumentation used in hot cells, although it is compact where necessary. Ample use of indicators and sensors, together with compact design of the reaction flasks for small dead space and efficient evaporation, led to good reliability and performance. The design of the hardware and software is described in this paper, together with a preparation of 3-N-[11C]methylspiperone as a sterile injectable solution in physiological saline

Search for Cosmic-Ray Antideuterons

We performed a search for cosmic-ray antideuterons using data collected during four BESS balloon flights from 1997 to 2000. No candidate was found. We derived, for the first time, an upper limit of 1.9E-4 (m^2 s sr GeV/nucleon)^(-1) for the differential flux of cosmic-ray antideuterons, at the 95% confidence level, between 0.17 and 1.15 GeV/nucleon at the top of the atmosphere.Comment: 4 pages, 3 figures, submitted to Phys. Rev. Let

Effective Launch-to-Capture Power Reduction for LOS Scheme with Adjacent-Probability-Based X-Filling

It has become necessary to reduce power during LSI testing. Particularly, during at-speed testing, excessive power consumed during the Launch-To-Capture (LTC) cycle causes serious issues that may lead to the overkill of defect-free logic ICs. Many successful test generation approaches to reduce IR-drop and/or power supply noise during LTC for the launch-off capture (LOC) scheme have previously been proposed, and several of X-filling techniques have proven especially effective. With X-filling in the launch-off shift (LOS) scheme, however, adjacent-fill (which was originally proposed for shift-in power reduction) is used frequently. In this work, we propose a novel X-filling technique for the LOS scheme, called Adjacent-Probability-based X-Filling (AP-fill), which can reduce more LTC power than adjacent-fill. We incorporate AP-fill into a post-ATPG test modification flow consisting of test relaxation and X-filling in order to avoid the fault coverage loss and the test vector count inflation. Experimental results for larger ITC\u2799 circuits show that the proposed AP-fill technique can achieve a higher power reduction ratio than 0-fill, 1-fill, and adjacent-fill.2011 Asian Test Symposium, 20-23 November 2011, New Delhi, Indi

CTX: A Clock-Gating-Based Test Relaxation and X-Filling Scheme for Reducing Yield Loss Risk in At-Speed Scan Testing

At-speed scan testing is susceptible to yield loss risk due to power supply noise caused by excessive launch switching activity. This paper proposes a novel two-stage scheme, namely CTX (Clock-Gating-Based Test Relaxation and X-Filling), for reducing switching activity when test stimulus is launched. Test relaxation and X-filling are conducted (1) to make as many FFs inactive as possible by disabling corresponding clock-control signals of clock-gating circuitry in Stage-1 (Clock-Disabling), and (2) to make as many remaining active FFs as possible to have equal input and output values in Stage-2 (FF-Silencing). CTX effectively reduces launch switching activity, thus yield loss risk, even with a small number of donpsilat care (X) bits as in test compression, without any impact on test data volume, fault coverage, performance, and circuit design.2008 17th Asian Test Symposium (ATS 2008), 24-27 November 2008, Sapporo, Japa